The present invention relates to fabrication methods and resulting structures for semiconductor devices, and more specifically, to controlling the channel length in vertical-type field effect transistors (FETs).
As demands to reduce the dimensions of transistor devices continue, new designs and fabrication techniques to achieve a reduced device footprint are developed. Vertical-type field effect transistors, hereinafter referred to as vertical FETs, have received increased attention because they can provide a reduced FET device footprint while meeting the necessary FET performance requirements in some areas.